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Python plot error-reg

While simulating the circuit we get "error while opening python plot editor" , we tried a lot. I think I can get the better solution from u for this problem.


eSim 05-02-18, 3:48 p.m. Jeevashubha

Answers:

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Hello,

Please paste cir file here.
Or send it to contact-esim [at] fossee [dot] in

05-02-18, 4:03 p.m. Gloria


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* C:\Users\Admin\eSim-Workspace\colpitts\colpitts.cir

* EESchema Netlist Version 1.1 (Spice format) creation date: 2/5/2018 3:08:52 PM

* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

* Sheet Name: /

Q1 Net-_C3-Pad2_ Net-_C1-Pad1_ Net-_C2-Pad1_ BC107

R4 Net-_C2-Pad1_ GND 1.2k

C2 Net-_C2-Pad1_ GND 0.1u

R3 VCC Net-_C3-Pad2_ 4.8k

R1 VCC Net-_C1-Pad1_ 380k

R2 Net-_C1-Pad1_ GND 72k

C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 0.1u

C3 vout Net-_C3-Pad2_ 0.1u

U1 vout plot_v1

L1 Net-_C1-Pad2_ vout 50m

C5 vout GND 0.01u

C4 GND Net-_C1-Pad2_ 0.01u

.end

05-02-18, 4:15 p.m. Jeevashubha

Value of Vcc is not specified.


05-02-18, 9:17 p.m. Gloria

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