facing problems with designing a counter

1.I am facing problems in simulating an up down counter built using jk-flip flops in xcos. The problem is that simulation never actually takes off. I have built a 12 bit counter and used scilab 5.5.2. All the packages are in place. Is there a way to make it work?

2. Can I get a model of an VCO?

Scilab 05-03-21, 12:40 p.m. gary36

I faced similar kind of issue last time, I am still searching for some proper solution Same issue still no fix to this.


07-04-21, 1:36 p.m. WiltonFaison

Source https://customwritingz.net and selection of your course of study should be working on the answer to that question suggesting working solution.
29-04-21, 2:34 p.m. scottmontes1

Nice information, valuable and excellent design, as share good stuff with good ideas and concepts, lots of great information and inspiration. getmyoffer capitalone com
19-05-21, 9:06 p.m. freemanmix

Interesting stuff to read. Keep it up.
28-07-21, 12:04 p.m. Scampirate

Log-in to answer to this question.